1. Overview SDR-B1 is a software defined radio platform launched by Zencheer, which uses Xilinx Zynq XC7Z045 and ADI AD9363/AD9361. In the original hardware design, the PS of SDR-B1 uses an input clock frequency of 33.333MHz, which is also the input clock frequency used in the reference design. However, recently some customers have proposed...
Continue readingSDR-B1 uses EEPROM to store MAC address
1. Overview SDR-B1 is a software defined radio platform based on Xilinx XC7Z045 + ADI AD9363/AD9361 launched by Zencheer Communication. In the hardware design of V1.0 and V1.1, EEPROM storage chips are not supported. Recently, some customers have proposed to add EEPROM to SDR-B1 to store MAC address, serial number and other information. This...
Continue readingLTE transmission test using SDR-B1
1. Overview This article describes the method of using the Zencheer SDR platform SDR-B1 to load LTE waveform for transmission testing in order to evaluate the performance of SDR-B1 and external RF power amplifiers. SDR-B1 is based on Xilinx XC7Z045 and ADI AD9361, and the RF power amplifier used in this article is DPA-1...
Continue readingSDR-B1 RF Test Report
1. Overview This document gives the RF test report of Zencheer SDR-B1 SDR platform, which can be used by customers to evaluate whether SDR-B1 can meet their own needs. SDR-B1 is implemented using Xilinx Zynq XC7Z045 and ADI AD9361/AD9363. 2. Test Equipments NI PCIe-5644R GWINSTEK GPD-3303S 3. Test Software Matlab R2024a (ADALM-PLUTO Radio Support...
Continue readingRGMII Layout Guide
Network equipment must be inseparable from MAC and PHY. Where there are MAC and PHY, there are corresponding interfaces. Whether visible or invisible, it is there. In Ethernet, this interface is the media independent interface, which is called Media Independent Interface in English, or MII for short. MII is suitable for 100M network equipment....
Continue readingAD9361 TDD state machine analysis and control
Recently, due to product development needs, we have been debugging the AD9361 on Zencheer's SDR platform SDR-A1. This hardware platform uses Xilinx's XC7A100T FPGA, with two MCUs, and has an Ethernet PHY interface. Its hardware architecture is shown in the figure below. The first thing to complete is naturally the configuration of AD9361. We...
Continue readingImplementation of DPSK modulation on AD9361
1 Overview The idea of implementing DPSK modulation on the AD9361 is as follows: first verify the spectrum after DPSK modulation in Matlab, then use a pseudo-random sequence as the original data in the FPGA, and send it to the AD9361 after upsampling, shape filtering, and the AD9361 completes the IQ modulated and ultimately...
Continue readingResearch and design of shaped filters
1 Overview In the process of developing SDR products using the AD9361, in order to compress the spectrum of the digital baseband signal within a certain bandwidth, the shaping filter is obviously an indispensable component. This article gives the design process of the shaping filter, which is not only applicable to the AD9361 ,...
Continue readingUnderstanding digital baseband signals
With the development of Zencheer's business and the deepening of R&D work, we have come into contact with more and more demands for SDR products, especially for boards with chips such as FPGA + AD9361. Before carrying out corresponding research and development work, we have done a lot of preparatory work. The first thing...
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